How to Read Laptop Schematics: Rails, Nets, Sequence

Updated November 8, 2026

A laptop schematic is the ODM’s design document for one specific board: typically 50 to 120 pages covering every IC, rail and connector. It looks overwhelming the first time, but most schematics follow the same structure, and once you know where things are, you can go from a symptom to a measurement point in a few minutes.

This guide covers picking the right PDF, the structure of a typical schematic, how rails and nets are named, and a worked no-power example. Schematic PDFs in the catalog are listed under schematics.

Pick the right PDF first

A schematic is drawn for a board, not for a laptop model. One model can ship with several boards (Intel or AMD, integrated or discrete graphics), and one board can be used in several models.

Read the board number and revision from the PCB itself. See how to find a laptop board number.
Open the schematic and check the cover page. It shows the project name, the board number and a revision, and often a change history.
Compare. The board number must match. A revision mismatch is usable with care: most circuits stay the same, but parts can be added, removed or renumbered.

Publicly available schematics are sometimes from pre-production builds. Small differences in part values or populated positions between the PDF and the real board are normal. The boards pages group schematics, boardviews and BIOS dumps by board number.

Structure of a typical schematic

The order varies by ODM and project, but most PDFs contain these sections:

Cover and revision history. Project code, board number, revision, date.
Index. A table of contents listing every page. Use it; scrolling is slow.
Block diagram. The CPU, chipset, memory, GPU, EC and connectors, with the buses between them (PCIe lanes, USB, SATA, eDP, eSPI or LPC, SMBus) and the page number of each block.
Power map or power tree. Which regulator produces which rail, from which source, and which signal enables it.
Power sequence. A timing diagram showing the order of rails and control signals from adapter insertion to the platform reset being released. This is the most useful page for no-power and no-boot faults.
Tables. GPIO assignments, strap settings, SMBus addresses, BOM options.
Functional pages. CPU, memory, chipset, EC, display, audio, USB, LAN, storage.
Power pages, often near the end. Charger, system 3 V/5 V, memory supply, CPU core regulator, GPU regulator, smaller LDOs.

Rail names

Rail names encode when a rail is present. The convention differs by ODM, but the suffix usually tells you the power state.

Pattern	Typical meaning	Examples
ALW, S5, PCU, G3H	Always on: present before the power button is pressed	+3VALW, +5VALW, +3VPCU, 3D3V_S5, PP3V42_G3H
S3, SUS	Stays on in sleep (S3)	+1.5VSUS, PP1V2_S3
S, S0, RUN	Present only when running	+3VS, +5VS, 3D3V_S0
B+, PPBUS, DCBATOUT	Main input after adapter or battery selection	B+, PPBUS_G3H, DCBATOUT

The examples come from Compal, Quanta, Wistron and Apple schematics; exact names vary even within one ODM. Other rails are named by function: +VCCIO is the Intel CPU I/O supply, +VCC_CORE or similar is the CPU core, and the memory rail carries the DDR voltage in its name. Modern Intel platforms that use Modern Standby may not have a classic S3 rail set at all.

Net names and signal conventions

Active-low signals carry a #, _N, _L or leading /, or are drawn with an overbar. PM_SLP_S3# and SLP_S3_L are the same idea on different platforms.
Power-good signals end in _PG, _PGOOD, PWRGD or PWROK.
Enable signals end in _EN or _ON (VR_ON, SYSON, SUSP# on many Compal boards).
Off-page connectors. When a net leaves a page, it ends in a flag-shaped label. Next to it, the schematic lists the page numbers where the net appears again; the format of that list differs by ODM.
Text search (Ctrl+F) works on vector PDFs and is often faster than following page references. Search for part of a long net name; some names are split or truncated. Scanned PDFs need OCR first.

Reference designators

Designator prefixes tell you what a part is: U for ICs, Q for transistors and MOSFETs, R, C, L and D for passives and diodes, F for fuses, J, JP or CN for connectors, Y or X for crystals. Many ODMs, Compal in particular, prefix power-section parts with P: PU, PQ, PR, PC, PL. Compal boards also use PJ jumpers, solder pads that join a regulator to its rail. Opening one is a quick way to tell whether a short is on the regulator side or the load side.

NC, @ and BOM options

A schematic covers every variant of a board, so not every part on the page is fitted on every board.

NC on a pin means not connected.
Not-installed parts are marked by a convention that differs by ODM. On Compal schematics a bare @ usually means a reserved position that is not built, and a prefix such as UMA@ or DIS@ ties a part to a BOM variant (integrated or discrete graphics). Other ODMs use DNI, NI, NS or an X. The first pages often explain the convention.
BOM option tables list which variants include which parts.
Value annotations such as 10K_0402_5% give value, package and tolerance.

Practical consequence: an empty footprint on the board is not automatically a missing part. Check the BOM marking before you start soldering.

Using the schematic with the boardview

The schematic shows logic; the boardview shows location. Use them together:

Find the rail or signal in the schematic and note a convenient part on it, ideally a capacitor or a resistor rather than an IC pin.
Search that designator in the boardview, or search the net name to highlight every point on it.
Measure at the easiest point: a large capacitor or a test pad.
If the boardview net name differs slightly, confirm by the part and pin instead.

See how to open boardview files for tools and formats.

Example: a no-power walkthrough

Before you start: work with ESD protection, and measure resistance to ground on B+ and the always-on rails before applying power. A low reading means a short to find before anything else. A current-limited bench supply is safer than the adapter.

Symptom: adapter connected, no reaction to the power button. The steps below use Compal-style names on an Intel laptop. Your board’s names and order will differ; follow its power sequence page.

Adapter input. Check the voltage at the DC jack. On the charger page, find the adapter detect signal (often ACIN or ACOK) and the input MOSFETs. Is B+ present at roughly adapter voltage? If not, look at the input protection, the input MOSFETs, the charger IC and shorts on B+.
Always-on rails. Find +3VALW and +5VALW on the power map and the regulator that makes them. If either is missing, check that regulator’s input, its enable pin and the rail’s resistance to ground.
EC alive. On the EC page, check its supply, its reset input and, if the design uses one, its clock. The EC also needs valid firmware. If it is powered but does nothing, suspect firmware before the EC itself. See flash a laptop BIOS with a CH341A.
Standby handshake. The EC releases RSMRST# to the chipset once the standby rails are good. If RSMRST# stays low, find the power-good input the EC is waiting for.
Power button. The button line to the EC should drop to 0 V while pressed. The EC then pulses the power-button signal to the chipset.
Sleep signals and main rails. The chipset raises SLP_S4# and SLP_S3#. The EC then turns on the memory rail and the S0 rails (+3VS, +5VS and others), then VR_ON for the CPU core regulator.
Power-good chain and reset. Power-good signals combine into the chipset’s PWROK inputs, and the platform reset is released.

The point where the chain stops tells you where to look. Two cautions: on some eSPI-based Intel designs the sleep signals travel as virtual wires over the eSPI bus and cannot be measured on a pin, and AMD platforms use different names (RSMRST_L, PWR_BTN_L, SLP_S3_L) with the same overall logic.